In the prior art, a gate driving signal of a liquid crystal display (LCD) panel is provided by a driver IC, a gate on array (GOA) structure can be used to scan a gate, and a rectangular waveform is shifted by use of a multi level gate (MLG) function of a timing controller Tcon so as to be provided to a gate line of a display screen as a gate driving signal.
In the existing GOA structure, after a row of pixel units are scanned, a potential of the gate driving signal of the gate line of the row of pixel units is reversed, that is, jumps from a high potential to a low potential or from a low potential to a high potential. At the moment of the jumping, an output signal, which is applied by a gate driving circuit through the gate line to the pixel units corresponding thereto, will generate a voltage rise or a voltage drop, which further leads to a jump voltage of the pixel units that is in certain direct proportion to the gate voltage drop.
Accuracy and symmetry of a pixel voltage are crucial, and one of the important factors that influence the accuracy of the pixel voltage is the jump voltage generated by coupling the voltage drop of the output signal provided by the gate driving circuit to the pixel units. A large voltage drop of the output signal from the gate driving circuit must result in a large jump voltage of the pixel units. At present, a method adopted for reducing the gate voltage drop is to share charges by the peripheral driver IC circuit of an array substrate in time sequence, so as to achieve the effect of reducing the voltage, thereby reducing a value of the gate voltage drop under the premise of little effect on charging of the pixel units.
However, the aforesaid charge sharing manner is not applicable to the GOA structure, so that further study on a charge sharing structure for the GOA structure is needed.